Extend your previous design of the $8-$ bit full $-$ subtractor to perform division. Explanations: You are not allowed to use predefined modules like adder, ALU, etc. or flip $-$ flops. Your divider should be built of gates. You should also deliver your documentation including your truth tables, your design decisions, etc. You should be aware that you will have to add components like memory, I $/$ O devices, CU $,$registers$,$ etc. to this design.