f = ?

2 Given the following Verilog code and the input valuations for a and ba[3]=1, a[2]=0, a[1]=1,2[0]=0, b[1]=1,6[0]=0 determine the output value of f and fill it in. Make sure to document your logic when arriving at your answer. 230 module freiCoder 24 input [3:01 a, 25 input [1:01 b, 26 output reg f 27 > ; 28 292 always@ (a,b) 30 begin 31 case (b) 32 0:- a [0]; 33 1: fa [1] 34 2: a [2]; 35 3: fa[31: 36 endcase 37 end 38 endmodule 3