Question: For a 3 2 M x 3 2 bits DRAM IC: i . Calculate the number of cells . . . . . . .
For a M x bits DRAM IC:
i Calculate the number of cells
ii How the cells are
arranged............................................................................................................................................
iii. Calculate the number of total addressable locations
iv What is the minimum number of bits required to form address to access all locations
v Write the first address in binary as well as in hexadecimal number
system.........................................................
vi Write the address of highest addressable location in binary as well as in hexadecimal
number system
vii. How many address pins this memory IC should have?
viii. How many data pins this memory IC should have?
ix What are the control pins this memory IC should have?
x What would be the size of address decoder?
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