Question: For a direct mapped cache design with 3 2 - bit address, the address is divided as follows: - bits 0 - 3 are used

For a direct mapped cache design with 32-bit address, the address is divided as follows:
- bits 0-3 are used for the offset
- bits 4-9 are used for the index
- bits 10-31 are used for the tag
What is the number of blocks in the RAM?
Select one:
a.32 Mega block
b.256 Mega block
c.128 Mega block
d.64 Mega block
e.512 Mega block

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