For a RAM memory of size 256K x 16, answer the following? a) How many address...
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For a RAM memory of size 256K x 16, answer the following? a) How many address lines are needed? b) How many data lines are needed? c) How many control lines are needed? d) What would be the size of MDR Register? e) What would be the size of MAR Register? Question 2: Given that the main memory access time is 1200 ns and cache access time is 100 ns. The average memory access time is not to exceed 120 ns. What is the hit ratio for the cache must be at least? For a RAM memory of size 256K x 16, answer the following? a) How many address lines are needed? b) How many data lines are needed? c) How many control lines are needed? d) What would be the size of MDR Register? e) What would be the size of MAR Register? Question 2: Given that the main memory access time is 1200 ns and cache access time is 100 ns. The average memory access time is not to exceed 120 ns. What is the hit ratio for the cache must be at least?
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Related Book For
Logic And Computer Design Fundamentals
ISBN: 9780133760637
5th Edition
Authors: M. Morris Mano, Charles Kime, Tom Martin
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