For the following operations

A $=$ p $+($q $$ r$)$

B $=($q $$ r$)($s $$ t$)$

C $=($t $$ u$)($u $+$ v$)$

D $=($v $$ w$)+($t $$ u$)$

E $=($A $$ B$)+$ C

F $=($D $$ C$)+$ B

Assume that multiplication requires $50$ clock cycle delay, add$/$sub requires $25$ clock cycle delay,

data transmission delay is negligible.

$($a$)$ Draw the Data flow graph for the above function.

$($b$)$ Apply ASAP algorithm and draw the resulting graph showing the start time for each node.

$($c$)$ Apply ALAP algorithm and draw the resulting graph showing the computation delay and start

time for each node. $($The maximum computation delay is same as that of ASAP algorithm$)$

$($d$)$ The priority for the nodes is based on the number of successors. With these priorities,

schedule the operations using list scheduling with a restriction on resources. Assume only two

multipliers, one adder and one subtractor blocks are available.

$($e$)$ For a FPGA with $150$ LUTs multiplication, addition, and subtraction requires $100,30,$ and $40$

LUTs respectively. Use list scheduling for temporal partitioning the above function and also find

the quality of partitioning.