For this assignment, you will take what you now know of the $8-$bit Logisim computer's ISA and opcodes, and write a program that performs power$-$of$-$two division in software $($using LSR that you implemented in the previous assignment$).$ Your program should be able to take a number that is evenly divisible by a power of two and an operand that is a power of two and divide the appropriate number of times $($by right shifting$).$ Your program should support all valid power of two operands that fit in the register. $($Don$\text{'}$t worry about negative values, or register overflows.$)$ For example, your program should be able to correctly divide $32$ by $4$ and have an answer of $8.$ Additionally, your program should be able to correctly divide $32$ by $8$ and have the answer of $4$ without any modifications to your program $($other than the operand change$)--$the same should apply to any power of two operands. The final correct answer only needs to reside in the Shift Register. Your program must work with the Logisim computer you submitted for the first assignment.

The larger of the two operands must come first and be loaded only in the $6$th byte of memory $(0$x$05$ using zero$-$based indexing$).$ The second operand, the smaller one, must be loaded in the $8$th byte of memory $(0$x$07$ using zero$-$based indexing$).$ This is how I will test your program. Your program must support all powers of two from $2$ to $64$ for both operands without changing the program in any way other than bytes $0$x$05$ and $0$x$07.$ The value of the shift register when the program counter reaches $0$xFF will be the answer to the division computation. Any solutions that don't support the above will receive zero credit for this part of the assignment. This part of the assignment is worth $150$ points. The Logisim $8-$bit computer cannot be further modified other than what was specified in Assignment #$1.$

All current opcodes on this machine:

LDX $01$

LDY $02$

LDA $03$

ADC $04$

SEC $05$

BCS $07$

CLC $08$

TAX $09$

JMP $0$b

STA $0$c

$0$d loads shift register $0$f shifts right by $1$

$0$e loads the rotate register $0$a rotates right by $1$