Given a simple CPU datapath and the definition of just a few operations, define and implement a state machine that correctly controls the datapath in response to any set of provided inputs. PROBLEM STATEMENT You will be given a datapath (register file, ALU, and associated connections) that has the ability to do simple addition and subtraction of 4-bit numbers. The datapath will come with a set of control signals that need to be asserted in the correct sequence in order for the operations to be executed properly. This sequencing will be provided by a state machine that you will design and implement based on the details provided ?