Given the address map table below for a memory that is constructed of $4$ RAM chips and $2$ ROM chips. The total size of the memory $($including RAM and ROM$)$ is $1024$ bytes.

$\backslash$table$[[$Component$,$Address Bus$],[10,9,8,7,6,5,4,3,2,1],[$RAM $1,0,0,0,$X$,$X$,$X$,$X$,$X$,$X$,$X$],[$RAM $2,0,0,1,x,$X$,$X$,$X$,$X$,$X$,$X$],[$RAM $3,0,1,0,$X$,$X$,$X$,$X$,$X$,$X$,$X$],[$RAM $4,0,1,1,x,x,x,x,x,x,x$