Given the following function f(A.B,C, D) = (B.C -D)+ (A -B-D) + (A -B-C) + (A- B-C) a straight forward implementation would use exactly one four-input LUT. Unfortunately, your FPGA architecture contains (two-input LUTS) Show how this function can be realized using only three (3) two-input LUTs. Complements of input signals are not available. Give the truth table implemented in each LUT. You will probably need to perform some minimization of the function.

i must implement this equation using three (3) two-input lookup tables only. first use truth table then the design ... help please

Given the following function: f(A,B,C,D) = (B-CD)+(A-B-D)+(A-B-C)+(A-B-C) a straightforward implementation would use exactly one four-input LUT. Unfortunately, your FPGA architecture contains two-input LUTS) Show how this function can be realized using only three (3) two-input LUTS. Complements of input signals are not available. Give the truth table implemented in each LUT. You will probably need to perform some minimization of the function