Question: h - is - problem tests given the f 1 1 . your ability to pr d . o owmg code to analyze: e ict

h-is-problem tests
given the f
11
. your ability to pr d.o owmg code to analyze: e ict the cache behavior of C
co
d
e.
Youti
1.
2
mt
X [2][128].
int
i '
'
Homework Problems
3
int
sum=
O;
4
5
for
(i
=
O;
i <
128;
i++)
{
6 sum += x [O]
[i]
*
X[1]
[i];
7}
Assume we execute this under the follow
ct
mg con 1ttons:
.\
sizeof(int)
=4.
Array x begins at memory address
OxO
and is stored in row-major order.
In each case below, the cache
is
initially empty.
The only
~emory
accesses are to the entries of thy array x. All other variables
are stored m registers. 1,-,
_;
i
Given these assumptions, estimate the miss rates for the following cases:
A. Case
1:
Assu1?e the cache is 512 bytes, direct-mapped, with 16-byte cache
blocks.
What
1s
the miss rate?B.
Case
2:
What
is the miss rate if we double the cache size to 1,024 bytes?
C.
Case 3: Now assume the cache is 512 bytes, two-way set associative using
an
LRU
replacement policy, with 16-byte cache blocks. What
is
the cache
miss rate?
D. For case 3, will a larger cache size help to reduce the miss rate? Why
or
why not?
E. For case 3, will a larger block size help to reduce the miss rate? Why
or
why
not?

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