Help an architect to design the ISA for a processor architecture that is specifically

designed for sorting algorithm. The user of architecture will either use bubble sort or

insertion sort on integers, with the maximum count of $10,000$ numbers. The architect would

start with the basic $5$ pipeline RISCV architecture. Suggest him $($a$)$ which instructions to use.

He is allowed to add as well as remove instructions from base instruction set, $($b$)$ Which

forwarding paths should be used, and any pipeline modification you would like to suggest $($c$)$

what should be memory architecture, $($d$)$ any other optimization$/$design option you would like

to suggest to the architect.

Find the performance of the base architecture, and your proposed architecture.