Help please!

Given above CPU with 32-bit architecture, we want to build a word-organized main memory system for this CPU composed of word organized memory modules of 4GB capacity each with 16-bit data bus interface. a) Draw the interface of the memory modules by clearly indicating the widths of the buses. b) Compute the maximum capacity of word organized main memory system that can be attached to the CPU. c) Design this main memory system internal organization built out of the above memory modules (use multiplexers and/or decoders as needed) by clearly indicating the widths of the used busses Given above CPU with 32-bit architecture, we want to build a word-organized main memory system for this CPU composed of word organized memory modules of 4GB capacity each with 16-bit data bus interface. a) Draw the interface of the memory modules by clearly indicating the widths of the buses. b) Compute the maximum capacity of word organized main memory system that can be attached to the CPU. c) Design this main memory system internal organization built out of the above memory modules (use multiplexers and/or decoders as needed) by clearly indicating the widths of the used busses