help with 8.12

8.11 Consider the three level circuit corresponding to the expression f(A, B,C, ing to the expression FA, B, C. D) - - (A + B)(B'C + BD) (a) Find all hazards in this cireuit. (b) Redesign the circuit as a three-level NOR circuit that is free of all hazards 8.12 Complete the timing diagram for the given circuit. Assume that both gates have a propagation delay of 5 ns. o5S2123303540 rEns) 8.13 Implement the logic function from Figure 8,l0b) as a minimum sum of products lind the static hazards and tell what mintems they arc between. Implement the same logic lunction as a sum of products without any hazards 8.14 Using lour valucd logic lind ABCD.AG and f 8.15 The following circuit was designcd toimplement the logic squation iAG) (A" + B + .)(A" +jr + C), but it is "oi wirking properly. The input wires to gates 1.2, and 3 an sa tiglhily packud, it would tike you a while to trace thcm all back to see whether the inpuis are coenect. I1 would be ttics to only have to trace whicheven onc is incorrocily wired. When L HU tlise inpats and outputs of gute 4 are