HERE IS THE PIC for THE REQUIRED STIMULUS

For this lab it is crucial that you put your flip-flop in a known state either SET or RESET (Terminology: RESET = CLEAR). For this lab, you will need to ensure that your clock signal is NOT a harmonic of your input signals AND that the clock signal is the highest frequency. For example, if working with a D flip-flop, the input to D could be 1000hz, but the clock could be 5436hz which is definitely not a harmonic, or multiple of 1000hz. Part 1. - D Latches and Flip-flops 1. Build the D-Flip-flop shown below. NOTE: a pdf of this figure is available as a separate file on Canvas. 2. Create a part for the D-Flip-Flop. 3. Create a new page and a circuit which will test your D-Flip-flop. The part with appropriate Digital Stimulus will suffice. A .stl file with a sample clear stimulus will be provided to you. Do not make your own clear/reset stimulus. For this lab it is crucial that you put your flip-flop in a known state either SET or RESET (Terminology: RESET = CLEAR). For this lab, you will need to ensure that your clock signal is NOT a harmonic of your input signals AND that the clock signal is the highest frequency. For example, if working with a D flip-flop, the input to D could be 1000hz, but the clock could be 5436hz which is definitely not a harmonic, or multiple of 1000hz. Part 1. - D Latches and Flip-flops 1. Build the D-Flip-flop shown below. NOTE: a pdf of this figure is available as a separate file on Canvas. 2. Create a part for the D-Flip-Flop. 3. Create a new page and a circuit which will test your D-Flip-flop. The part with appropriate Digital Stimulus will suffice. A .stl file with a sample clear stimulus will be provided to you. Do not make your own clear/reset stimulus