Hi! I want to write a complete code in Verilog 2001 for the following circuit (Sum of difference). This particular circuit is designed for 5x5 wide windows, so the task is this: 1) create a code for the following circuit and 2) it has to be adjastable for up to 21x21 wide windows. If someone could provide a complete code for me it would be really helpfull, thanks!

Compute SAD for current column Store best disparity (lowest SAD) RAM buffers for 5 rows Accumulate multiple coiumn SADs to torm 55 windew of image data RAM for 1 row of disparity data (SAD and value)