How do I do this in Logisim with the provided blank sub$-$ circuit image? Question below the image.

The first memory device in this system is an $8$K firmware ROM corresponding to the memory address range $$0000$ to $$1$FFF$.$ Show the logic to generate a CE signal$($s$)$ for this ROM, which should be active low, if one $8$K x $8$ ROM chip is used. Draw and test the complete circuit in Logisim within the $"$Q$1"$ subcircuit in the provided file, using traditional logic gates.

$($Hint: Note that an $8$K x $8$ memory chip has a capacity of $8192$ bytes; since only one of these chip is needed to create a single $8$K x $8$ ROM memory unit, only one CE signal is needed for this chip.$)$