HW04 Q6. Two positive IEEE 754 floating point values differ by the smallest magnitude possible. Which bit position(s) in these the two bit strings for these values are different? HW04 Q2. A 1-bit latch can be built from four 2-input NAND gates (text Figure 2.14), and a NAND gate can be built from complementary MOSFET transistors (text Figure 2.5). How many transistors are required to implement the 1-bit latch elements in a register file comprising sixty-four 64-bit registers? Write your answer in the form 2X = for the appropriate values of X and the integer. HW04 Q6. Two positive IEEE 754 floating point values differ by the smallest magnitude possible. Which bit position(s) in these the two bit strings for these values are different? HW04 Q2. A 1-bit latch can be built from four 2-input NAND gates (text Figure 2.14), and a NAND gate can be built from complementary MOSFET transistors (text Figure 2.5). How many transistors are required to implement the 1-bit latch elements in a register file comprising sixty-four 64-bit registers? Write your answer in the form 2X = for the appropriate values of X and the integer