I am not too sure how to do state tables$/$diagrams$,$ K$-$maps and Block diagrams in relation to the following systems:

a$.$ Draw a State stable for the Sequence Recogniser

b$.$ Draw K$-$maps for : Sequence Recogniser and Pattern displays, Decoder, BCD Counter

c$.$ Draw Block Diagrams for: sequence recogniser, decoder, multiplexer $(16,2$ to $1),$ BCD counter, clock divider, and pattern display.

FOR MORE CONTEXT:

The aim is to create a Smart Multi$-$Purpose Clock using the OMDAZZ Altera $($Intel$)$ FPGA Experimenter Board.

System Initialisation when powered up or reset, it should enter a locked mode. The $7$ segment displays $($SSD$)$ should show $$EEEE$$ and all $4$ LEDs should remain off.

Password Recogniser the binary sequence $$password$$ which is $\text{'}4408\text{'}.$ If the digit is even $($including zero$),$ it will be represented by a $1,$ and if it is odd, it will be represented by a $0.$ Each button entry must only trigger one change in state $($i$.$e$.$ holding the button does not enter multiple digits$),$ and you can assign two pushbuttons for $0$ and $1,$ respectively.

Examples of converting to binary sequence:

$1234$ has $($OEOE$)$ pattern and would become $0101($O$-$Odd, E$-$Even$)$

$2258($EEOE$)$ would become $1101$

$8239($EEOO$)$ would become $1100$

Also, the progress of the sequence recogniser should be displayed on the seven$-$ segment displays. Example with $5678,$ which has a password $(0101)$:

$$ Initial SSD output E E E E

$$ Input correct $1$ st number $5$ E E E

$$ Input correct $2$ nd number $56$ E E

$$ Input incorrect $3$ rd number E E E E

Any incorrect inputs MUST reset the system to the starting state. For example, with a passcode of $0001$ currently at the state $000$E$,$ the system should return to EEEE if the next input is a $0.$ Once the correct sequence has been entered, the system should exit the locked mode and enter a Clock Mode. When your system is in Clock Mode, the $4$ LEDs should all light up and remain lit.

Clock Mode $-$ where the SSD function as a clock. The lowest unit of the clock should be one$-$hundredth of a second. Thus the clock should increment every hundredth of a second. When the clock equals the four digits, the system should reset the clock to zero and continue to count.

Example with $12805678$:

$$ At time t$,$ clock is less than last four digits $5677$

$$ At time t$+1,$ clock is same as last four digits $5678$

$$ At time t$+2,$ clock resets $0000$