Question: I need assistance for Exercise 7.2 only please. Exercise 7.1 Suppose that one of the following control signals in the single-cycle ARM processor has a

I need assistance for Exercise 7.2 only please. Exercise 7.1 Suppose

I need assistance for Exercise 7.2 only please.

Exercise 7.1 Suppose that one of the following control signals in the single-cycle ARM processor has a stuck-at-0 fault, meaning that the signal is always 0, regardless of its intended value. What instructions would malfunction? Why? (a) Reg W (b) ALUOp (c) Mem W Exercise 7.2 Repeat Exercise 7.1, assuming that the signal has a stuck-at-1 fault

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