I need help creating this initialization function for an MSP430FR6989 8.4 Changing the Configuration In this part, we will modify the UART configuration by making two changes. First, well use ACLK based on the 32 KHz crystal as the clock source (rather than SMCLK). Secondly, well setup a baud rate of 4800 (rather than 9600). The other parameters remain the same as earlier. In this configuration, its not possible to do oversampling since we cant generate a receiver clock signal at 16 x 4800 Hz starting with a clock signal at 32768 Hz. Two changes are needed to setup this configuration. First, use a suitable value of UCSSEL to select ACLK as the clock source. Look in the family users guide at the end of the UART chapter. Secondly, find the new values of the dividers and modulators by looking in the family users guide in the UART chapter. What are the values of: UCOS16, UCBR, UCBRF and UCBRS? Hint: it turns out UCBRF is dont care since its only used with oversampling. Do the changes in a new UART initialization function, Initialize UART 2() and test it by transmitting incrementing numbers (0, 1, 2, ...) in an infinite loop. To configure ACLK to the 32 KHz crystal, use the function from earlier labs: config ACLK to 32KHz crystal(). Finally, make sure to change the settings in the terminal application to a baud rate of 4800.

void Initialize_UART(void) { // Divert pins to UART functionality P3SEL1 &= ~(BIT4|BIT5); P3SEL0 |= (BIT4|BIT5); // Use SMCLK clock; leave other settings default UCA1CTLW0 |= UCSSEL_2; // Configure the clock dividers and modulators // UCBR=6, UCBRF=13, UCBRS=0x22, UCOS16=1 (oversampling) UCA1BRW = 6; UCA1MCTLW = UCBRS5|UCBRS1|UCBRF3|UCBRF2|UCBRF0|UCOS16; // Exit the reset state (so transmission/reception can begin) UCA1CTLW0 &= ~UCSWRST; }

void config_ACLK_to_32KHz_crystal() { // By default, ACLK runs on LFMODCLK at 5MHz/128 = 39 KHz // Reroute pins to LFXIN/LFXOUT functionality PJSEL1 &= ~BIT4; PJSEL0 |= BIT4; // Wait until the oscillator fault flags remain cleared CSCTL0 = CSKEY; // Unlock CS registers do { CSCTL5 &= ~LFXTOFFG; // Local fault flag SFRIFG1 &= ~OFIFG; // Global fault flag } while((CSCTL5 & LFXTOFFG) != 0); CSCTL0_H = 0; // Lock CS registers return;

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