I need help with T$\_$A$3,$ T$\_$A$2,$ T$\_$A$0,$ T$\_$A$1$ K$-$Maps.

Your task is to design $4$ bit binary counter using T Type Flip Flops.

First, fill the state table in the second page in this document

Then, fill the karnough maps for all flip flops in the second page of this document. Then find the boolean functions.

Lastly, design your $4-$bit counter on Proteus Design Suite. In your design, use a single $7-$segment bcd$.$ Counter should start from $0$ and increase one per $1$ second.

Count order should be as in state diagram on the right

Seven segment display should display corresponding BCD value as follows

$0123456789ABCDEF01$dots

PS: A template project is given in the attached files.

$7-$SEG$-$BCD$-$GRN: BCD input $7$ segment display

JKFF: JK Type Flip Flop $($You must use

this to create T Type Flip Flop$)$

And Gate: Logic and gate

Logic State, Logic Probe$($big$)$