i need the code using vhdl

Simple Sequence Detector You are required to design a circuit that can be used to count the number of times a specific sequence of characters is detected in its input stream. The user of the circuit first serially loads a sequence of characters to be detected. Then a large input stream is loaded into the circuit serially. The circuit should output the number of times the sequence appeared in the input stream: Circuit Description: Shift Register: A standard serial_in parallel out shift register. You will need two instances of this component. One to store the sequence to be detected and counted and the other for the serial input data. Comparator: This combination circuit compares the parallel outputs of the two shift registers and sets an output to 1 when the two outputs are equal. Counter: A simple up counter that counts up when the circuit is operational (shift_data_in =1) and the comparator has indicated that the sequence has been detected. Design Requirements: You are required to write a report clearly explaining the design and function of this circuit. In the report you have address the following: 1) Design and successfully simulate the sequence detector for any size of m and k. [20 points] 2) Write a VHDL testbench that simulates the circuit. [10 points] 3) Design the circuit with "generic" m and k parameters. [5 points] 4) Write a VHDL code for a testbench that reads the input data from a text file. [5 points] 5) Write a technical document describing the design and operation of the final circuit. [10 points]