I want to know how to do the logic gate diagram for $4-$bit ALU using labview

ALU Design Document: Detailed documentation of the ALU architecture, specifications, and design

considerations.

ALU Implementation: Hardware implementation of the ALU on a chosen platform $($FPGA or ASIC$).$

Simulation Results: Comprehensive simulation results demonstrating the functionality and performance

of the ALU under different test scenarios.

Optimization Report: Analysis of the ALU design optimizations and their impact on performance, area,

and power consumption.

Part $1$: Circuit Design

The ALU circuit should be a $4$ bit ALU with the following functions

Not A $($One$\text{'}$s Complement$)$

A OR B

A AND B

A$+$B

The ALU will execute the functions using the following table