Implement the following logic circuit with two output, P and Q using one or more of the following ROMs: 4 times 1, 4 times 2, 8 times 1, 8 times 2, 16 times l, and 16 times 2. Determine the total number of memory (ROM) bits used your design. Your design should use least number of memory bits. Draw a neat, labeled diagram showing interconnections between the ROMs, address and data lines, and the contents of each ROM. P (v, w, x, y, z) = w x^- y + v^- z^- + wx^- y^- + vz Q(w, x, y, z) = wx^- y^- + wyz