in C

write program to convert any R-format MIPS machine code to its instructions. Refer to the MIPS sheet to find all possible operators you need to implement.

You program must produce the following sample results in the exact same format:

Example:

Input:

Enter an instruction: 00000001000010011000100000100000

output:

add s1, t0, t1 Operation: add

Rs: t0 (R8) Rt: t1 (R9) Rd: s1 (R17) Shamt: 0 Funct: 32

MIPS Reference Data FOR ada 25 CORE INSTRUCTION SET OPCODE /FUNCT NAME, MNEMONIC MAT OPERATION (in Verilog) (Hex) Add RR[rd] - [s] + [ru] (1) 0/20 Add Immediate addi IR[H] R[rs] + SignExtImm (1.2) Shox Add Imm. Unsigned addiu IR[t] R[6) + Sign Imm Add Unsigned R R[rd] - R+R[] 0/21 And RR[rd] - R&R And Immediate andi IR[it] R[rs) & Zero Extmm (3) Branch On Equal beg 1 if R[r]-[ PC-PC+4+BranchAddr (4) Branch On Not Equale ifR[] R[ot] 1 PC-PC+4+BranchAddr (4) She Jump 3 J PC-JumpAddr (5) Jump And Link jal R[31]-PC+8;PC-JumpAddr (5) Jump Register 13 R PC-REST Load Byte Unsigned Ibu 1 R[it]-[240,M[R[ES] SignExilmm(7:0) (2) 24h Load Halfword R[11]-1660,MER[r] 1 Unsigned +SignExtim(15:0) Load Linked IR[1] - MIR[r]+SignExtmm] (2.7) 30% Load Upper Imm I R[ut] - fimm, 16'60) Load Word IN IRENT) MERS]+Signleximum (2) 23h Nor BOE RR[rd] --([] R[R] Or Or R RE- RR[r] Or Immediate IR[it] R[CS] ZeroExtImm Set Less Than slt R R[od] - [ES] R[1]?1:0 Set Less Than Imm. at IR[it] =(R[ES] SignExtImm)? 1:0 (2) Set Less Than Imm. altiu R[it] - (R[n] Sign ixtim) 1 Unsigned (2.6) Set Less Than Unsin situ R R[rd] - (R[r] R[R]?1:0 (6) 0/2 Shift Left Logical RR[rd] - Rr] shame 0/00 Shift Right Logical 61 R R[od] R[nt] >> shamt Store Byte 1 MIR[]+Sign Ex(7:0) - R[77:0) Store Conditional 1 MER[]+SignExtmm] - [H] R[n] (atomie) 1:0 (2.7) Store Hallword 1 MR[ES]+SignExtImm) 13:0) = R[R15:0) (2) Store Word I MIR [rs)SignExtimm)R[) (2) 2h Subtract R REd) -R- RH (1) 0/22 Subtract Unsigned bu RR[rd] - [s] - [HD] 0/27 o/25 012 0/23 0/25mx Subtract RR[rd] R[rs) - Rint (1) 0/22hex Subtract Unsigned suu R R[rd] - R[rs) - Rit] (1) May cause overflow exception (2) SignExtimm- ( 16 immediate[15]], immediate (3) ZeroExtImm - {161b0), immediate } (4) BranchAddr - 14{immediate[15]), immediato, 2'DO} (5) JumpAddr - PC+4[31:28), address, 200 } (6) Operands considered unsigned numbers (vs. 2's comp.) (7) Atomic test&sct pair, R[rt] -1 if pair atomic, O if not atomic BASIC INSTRUCTION FORMATS R opoode rd shamt funct 26 25 21 20 0 1 immediate 21 20 J opcode address REGISTER NAME, NUMBER, USE, CALL CONVENTION NAME NUMBER PRESERVED ACROSS USE A CALL? Szero 0 The Constant Value 0 NA Sat 1 Assembler Temporary No $vo Svi 2-3 Values for Function Results No and Expression Evaluation Sal-Sa3 4-7 Arguments No Sto-St7 8-15 Temporaries NO $0-$57 16-23 Saved Temporaries Yes SER-ST9 24-25 Temporaries NO $KO-SKI 26-27 Reserved for OS Kernel No Sgp 28 Global Pointer Yes Ssp 29 Stack Pointer Yes 30 Frame Pointer Yes Sra 31 Return Address TS 31 16 15 65 opcode rs 31 26 25 16 IS 0 Sip Yes 31 25 25 0 MIPS Reference Data FOR ada 25 CORE INSTRUCTION SET OPCODE /FUNCT NAME, MNEMONIC MAT OPERATION (in Verilog) (Hex) Add RR[rd] - [s] + [ru] (1) 0/20 Add Immediate addi IR[H] R[rs] + SignExtImm (1.2) Shox Add Imm. Unsigned addiu IR[t] R[6) + Sign Imm Add Unsigned R R[rd] - R+R[] 0/21 And RR[rd] - R&R And Immediate andi IR[it] R[rs) & Zero Extmm (3) Branch On Equal beg 1 if R[r]-[ PC-PC+4+BranchAddr (4) Branch On Not Equale ifR[] R[ot] 1 PC-PC+4+BranchAddr (4) She Jump 3 J PC-JumpAddr (5) Jump And Link jal R[31]-PC+8;PC-JumpAddr (5) Jump Register 13 R PC-REST Load Byte Unsigned Ibu 1 R[it]-[240,M[R[ES] SignExilmm(7:0) (2) 24h Load Halfword R[11]-1660,MER[r] 1 Unsigned +SignExtim(15:0) Load Linked IR[1] - MIR[r]+SignExtmm] (2.7) 30% Load Upper Imm I R[ut] - fimm, 16'60) Load Word IN IRENT) MERS]+Signleximum (2) 23h Nor BOE RR[rd] --([] R[R] Or Or R RE- RR[r] Or Immediate IR[it] R[CS] ZeroExtImm Set Less Than slt R R[od] - [ES] R[1]?1:0 Set Less Than Imm. at IR[it] =(R[ES] SignExtImm)? 1:0 (2) Set Less Than Imm. altiu R[it] - (R[n] Sign ixtim) 1 Unsigned (2.6) Set Less Than Unsin situ R R[rd] - (R[r] R[R]?1:0 (6) 0/2 Shift Left Logical RR[rd] - Rr] shame 0/00 Shift Right Logical 61 R R[od] R[nt] >> shamt Store Byte 1 MIR[]+Sign Ex(7:0) - R[77:0) Store Conditional 1 MER[]+SignExtmm] - [H] R[n] (atomie) 1:0 (2.7) Store Hallword 1 MR[ES]+SignExtImm) 13:0) = R[R15:0) (2) Store Word I MIR [rs)SignExtimm)R[) (2) 2h Subtract R REd) -R- RH (1) 0/22 Subtract Unsigned bu RR[rd] - [s] - [HD] 0/27 o/25 012 0/23 0/25mx Subtract RR[rd] R[rs) - Rint (1) 0/22hex Subtract Unsigned suu R R[rd] - R[rs) - Rit] (1) May cause overflow exception (2) SignExtimm- ( 16 immediate[15]], immediate (3) ZeroExtImm - {161b0), immediate } (4) BranchAddr - 14{immediate[15]), immediato, 2'DO} (5) JumpAddr - PC+4[31:28), address, 200 } (6) Operands considered unsigned numbers (vs. 2's comp.) (7) Atomic test&sct pair, R[rt] -1 if pair atomic, O if not atomic BASIC INSTRUCTION FORMATS R opoode rd shamt funct 26 25 21 20 0 1 immediate 21 20 J opcode address REGISTER NAME, NUMBER, USE, CALL CONVENTION NAME NUMBER PRESERVED ACROSS USE A CALL? Szero 0 The Constant Value 0 NA Sat 1 Assembler Temporary No $vo Svi 2-3 Values for Function Results No and Expression Evaluation Sal-Sa3 4-7 Arguments No Sto-St7 8-15 Temporaries NO $0-$57 16-23 Saved Temporaries Yes SER-ST9 24-25 Temporaries NO $KO-SKI 26-27 Reserved for OS Kernel No Sgp 28 Global Pointer Yes Ssp 29 Stack Pointer Yes 30 Frame Pointer Yes Sra 31 Return Address TS 31 16 15 65 opcode rs 31 26 25 16 IS 0 Sip Yes 31 25 25 0