Question: In class we talked about how gates work at the CMOS transistor level. For example, we have analyzed how the transistors composing the two-input NAND

 In class we talked about how gates work at the CMOS

In class we talked about how gates work at the CMOS transistor level. For example, we have analyzed how the transistors composing the two-input NAND gate switch ON/OFF depending on the inputs, and how this determines the value of the output. In this problem you are required to perform a similar analysis for the circuit in the figure below. The circuit is composed by 3 PMOS transistors (P1, P2 and P3) and 3 NMOS transistors (N1, N2 and N3. It has two inputs (a and c) and one output (f). An intermediate signal is also present (b). a. In the table below, for each value of the input, write the state (ON/OFF) of each transistor, the value of b and the value of f. b. The circuit is actually the cascade of two gates. Which are they? c. Redraw the circuit using the corresponding gate symbols, and clearly label their input and output

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