In this activity, we will analyze the functionality of our new multi$-$purpose process

The addition of a register file$--$ and two new control signals$--$ has significantly altere several of this processor's instructions. Using this new architecture, how would you perform the each of the following operations? i$.$e what would each of these signals be: opcode, use$\_$input, $R_{-}$source, and R$\_$destination.

Clear any particular register.

Perform a logical shift left on a particular register's value.

Load an input value.

Square the value in a particular register.

Double the value in a register

Halve the value in a register.

Suppose your circuit is provided with a single slowly$-$changing $8-$bit input, $P[7$:$0].$ What sequence of instructions would use use to compute the followin expression? Keep in mind that each instruction's machine code now have four parts: opcode, use$\_$input, R$\_$source, and R$\_$destination.

@$P^3-2**p^2+p$

Sketch an FSM diagram of a controller that will implement the program above.

Suppose the input to the circuit wasn't changing slowly; that it was only guarantee be present at the start of the program. What change would you have to make to your program?

Suppose your new processor's input changed to a new value every $4$ clock cycles. Write a sequence of instructions that finds the average of $4$ consecutive input values.