In this question, you are required to design conversion modules that will:

$(1)$ Convert serial single$-$bit Manchester code to PAM$4(2-$bit outputs$)$

voltage levels.

Create a test bench to test the functionality of the module. In your test

bench, change the input data during the clock cycle, and test how your

design is dealing with possible glitches, when the output is connected to

combinational logic directly without any registers. Clearly show how you can

modify the code to avoid output glitches. Test your updated design

approach. Document your work well in the final pdf submission. The

deliverables should include the code, test bench and simulation results.

$(2)$ Convert PAM$4(2$bit inputs$)$ back to Manchester coding.

Create a test bench to test the functionality of the modules. In your test

bench, change the input data during the clock cycle, and test how your

design is dealing with possible glitches, when the output is connected to

combinational logic directly without any registers. Clearly show how you can

modify the code to avoid output glitches. Test your updated design

approach. Document your work well in the final pdf submission. The

deliverables should include the code, test bench and simulation results.