In verilog language make this logic:

variables:

1- encoded (n bits)

2- Rx (n bits)

3-Hd (n bits)

for L no of times we should compare the no of bits of both encoded and Rx and get the number of different bits and store it in Hd (as n bits)

for example: set n=4

encoded is 1011

Rx is 0011

comparing both there will be 1 bit difference so Hd should be 0001 and this for L no of times