Instruction Set Simulator (ISS)

EE312 Introduction to Computer Architecture

1. Introduction In this Project, you will implement an instruction set simulator (ISS) for the KAIST RISC Processor 2.0 (KRP 2.0). The ISS should follow the instruction set architecture (ISA) specified in KRP Users Manual, and meet the requirements in Section 2. 2. Requirements Language: C/C++ Project environment: To be announced Execution file name: krpiss Output file: A dump file of the data memory Data memory size: 4KB Program memory size: 4KB Endian: Little endian 3. ISS Implementation Functions For every instruction, display the following information (1) Program Counter (PC) (2) Instruction Register (IR, the instruction being executed) (3) Interrupt Enable (IE) (4) Interrupted PC (IPC) (5) General-purpose registers (GPR) (6) Memory address and data being accessed (NOTE: Memory access instructions only) How to Execute

krpiss input_file_name output_file_name

1) When started, ISS is idle waiting for the users command 2) When s is typed on the prompt : Execute one instruction and display the prompt 3) When r is typed on the prompt : The entire program is executed to the end without displaying the temporary information. A. The final values of the PC, IR, IE, IPC, GPR should be displayed. B. The contents of the data memory at a specific address should be displayed and DUMPED into the output file.