Instructions:

Draw common Bus (Figure 5.4)

Draw Memory,Register,I/O instruction Formats (Fig. 5.5)

Draw one stage of Arithmatic Unit (Fig. 4.9)

(This is the data down below)

Opcode	General Registers	Condition Code	Index Register	Mode	Future	Address
12	9	4	6	6	3	38
4K	512	16	64	64	8K	256G

Program Organization

Opcode	12 bits is 1k Assembly Instructions, LDA, STA, ADD, SUB, MUL, JMP
General Registers	9 bits is 512 Registers, R1,R2,.R64
Condition Code	4 bits is 16, Condition for branching
Index Register	6 bits is 64 Index Registers INR1,INR2,.
Mode	6 bits is 64 Indirect, immediate,..
Future	3, Future Changes
Address	38 bits is 256G Size of Memory/cache address