It is required to develop a system to swap the contents of two n$-$bit registers. Assume that a temporary register is available to assist swapping. Adopt state table approach to design control circuit. Control circuit has two inputs clock and w $.$ The swapping process is initiated when $\backslash (\backslash$mathrm$\{$w$\}=1\backslash ),$ and on completion the control circuit asserts a signal Done to $1.$

i$)$ Derive the expression for the outputs of control circuit.

ii$)$ Develop bus architecture of the system based on tri$-$state buffer.