Question: ITSC 3181 Introduction to Computer Architecture, Spring 2021 Homework #1,02/15/2021 Monday, Last change: 01/19 Covered topics: Chapter 1 Questions 1.5 1.6 1.7 1.14 1.16 Total

 ITSC 3181 Introduction to Computer Architecture, Spring 2021 Homework #1,02/15/2021 Monday,Last change: 01/19 Covered topics: Chapter 1 Questions 1.5 1.6 1.7 1.141.16 Total Points 24 16 24 24 12 100 Submission: 1. Onlyelectronic submissions on canvas are accepted. 2. All your solutions should be

ITSC 3181 Introduction to Computer Architecture, Spring 2021 Homework #1,02/15/2021 Monday, Last change: 01/19 Covered topics: Chapter 1 Questions 1.5 1.6 1.7 1.14 1.16 Total Points 24 16 24 24 12 100 Submission: 1. Only electronic submissions on canvas are accepted. 2. All your solutions should be included in a SINGLE PDF file. Include your full name in the PDF file. 3. Number your solutions in the same way and in the same order as the questions are numbered in this document and do NOT include the questions as part of your solutions. 4. Scanned copy of handwritten work are accepted and graded only if it is written clearly and readable. 1.5 [4] Consider three different processors P1, P2, and P3 executing the same instruction set. Pl has a 3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock rate and has a CPI of 2.2. a. Which processor has the highest performance expressed in instructions per second? b. If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions. c. We are trying to reduce the execution time by 30% but this leads to an increase of 20% in the CPI. What clock rate should we have to get this time reduction? 1.6 [20] Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (class A, B, C, and D). P1 with a clock rate of 2.5 GHz and CPIs of 1, 2, 3, and 3, and P2 with a clock rate of 3 GHz and CPIs of 2, 2, 2, and 2. Given a program with a dynamic instruction count of 1.0E6 instructions divided into classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D, which implementation is faster? a. What is the global CPI for each implementation? b. Find the clock cycles required in both cases. 1.7 [15] Compilers can have a profound impact on the performance of an application. Assume that for a program, compiler A results in a dynamic instruction count of 1.0E9 and has an execution time of 1.1 s, while compiler B results in a dynamic instruction count of 1.2E9 and an execution time of 1.5 s. a. Find the average CPI for each program given that the processor has a clock cycle time of 1 ns. b. Assume the compiled programs run on two different processors. If the execution times on the two processors are the same, how much faster is the clock of the processor running compiler As code versus the clock of the processor running compiler B's code? c. A new compiler is developed that uses only 6.0E8 instructions and has an average CPI of 1.1. What is the speedup of using this new compiler versus using compiler A or B on the original processor? 106 1.14 Assume a program requires the execution of 50 x FP instructions, 110 x 106 INT instructions, 80 x 106 L/S instructions, and 16 x 106 branch instructions. The CPI for each type of instruction is 1, 1, 4, and 2, respectively. Assume that the processor has a 2 GHz clock rate. 1.14.1 [10] By how much must we improve the CPI of FP instructions if we want the program to run two times faster? 1.14.2 [10] By how much must we improve the CPI of L/S instructions if we want the program to run two times faster? 1.14.3 [5] By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 40% and the CPI of L/S and Branch is reduced by 30%? If you show the new CPI for 1.14.2 and 1.14.2, that will be fine. 1.16 Convert the following binary numbers to decimal numbers, show the steps of your work. a) 1110, b) 100100, c) 11010111, d) 011101010100100

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