Question: Linear Paging We use Simulator paging - linear - translate.py to study how the address translation work with the linear paging table. We ran a

Linear Paging
We use Simulator paging-linear-translate.py to study how the
address translation work with the linear paging table. We ran a
configuration and got the following output with a slight modification.
Work on the following questions.
ARG address space size 32K
ARG phys mem size 1M
ARG page size 2K
ARG verbose True
ARG addresses -1
The format of the page table is simple:
The high-order (left-most) bit is the VALID bit.
If the bit is 1, the rest of the entry is the PFN.
If the bit is 0, the page is not valid.
Use verbose mode (-v) if you want to print the VPN # by
each entry of the page table.
Page Table (from entry 0 down to the max size)
Given the answer in decimal format, so don't use hexidecimal or binary format for solutions in the four questions below. Given the configuration perform the configuration in the image for the four questions below.
1) For Virtual Address 0x000033e7(hexadecimal), fill in the blank its VPN (virtual page number) in decimal format.
2) For Virtual Address 0x000057c5(hexadecimal), if it is an invalid address, fill in the blank with -1, otherwise fill in the blank with the mapped PFN (physical frame number) in decimal format.
3) For Virtual Address 0x000065a8(hexadecimal), if it is an invalid address, fill in the blank with -1, otherwise fill in the blank with the mapped physical address in decimal format.
For Virtual Address 0x000065a8(hexadecimal), if it is an invalid address, fill in the blank with -1, otherwise fill in the blank with the mapped physical address in decimal format.
4) For Virtual Address 0x0000285f (hexadecimal), if it is an invalid address, fill in the blank with -1, otherwise fill in the blank with the mapped physical address in decimal format.
Linear Paging We use Simulator paging - linear -

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