Make a finite state machine diagram for the following problem:

please include a truth table or/and logic design.

Problem # 1: Sequence Detector-receives and detects a bit serial sequence from single-bit input X and asserts an output Z (i.e. Z-1) when it detects a pattern binary string of 0110. One bit at a time is presented to your logic. Use symbolic states with letters 'A; 'B' etc for you states. Assume State 'A' is where it all starts out from reset