microprocessors

The following picture shows two memory modules connected to a data bus and driven by the address bus and control signal WJB' of a CPU. Assume that the signal W/B' is 0. Which is the range of addresses for the LOW memory bank, expressed in hexadecimal? ADORESS BUS 1210 AS LINES ABAIS UNES ATAT 11111 UNE AS LINES ATAY TIT 2232 88586858 82 A os! QUE cal DATA BUS LINES DIS- AB DATA BUS LINES 07-00 WRLEN 98 HIGH BAK LOW BANK AD A13 A12 A10 WE Seleccione una: a. 9001 to 9DFF (odd adresses) b. 6200 to 62FE (even addresses) c. None of the answers is correct d. 9D01 to 9DFE (even adresses)