Multi$-$Cycle Processor Design $(20$ points$)$

$1.$ Detailed Cycle Counting with Varying Latencies: A multi$-$cycle processor executes different types of instructions with varying cycle counts as follows:

$$ ALU operations $($e$.$g$.,$ add, sub$)$: $4$ cycles

$$ Load word $($LW$)$: $5$ cycles

$$ Store word $($SW$)$: $4$ cycles

$$ Branch instructions $($e$.$g$.,$ BEQ$)$: $3$ cycles

Given a program with the following instruction mix:

$40\%$ ALU operations

$30\%$ load instructions

$20\%$ store instructions

$10\%$ branch instructions

If the program consists of $10,000$ instructions, calculate the total number of cycles required to execute the program and determine the average CPI.

$2.$ Impact of Hazard Mitigation Techniques: In a multi$-$cycle processor, assume the following base cycle counts for different types of instructions:

$$ ALU operations: $4$ cycles

$$ Load $($LW$)$: $5$ cycles

$$ Store $($SW$)$: $4$ cycles

$$ Branch $($BEQ$)$: $3$ cycles

Introducing hazard detection and forwarding techniques adds $1$ extra cycle to ALU and branch instructions but eliminates $1$ cycle from load instructions. Given the same instruction mix as above, calculate the new total number of cycles required to execute the $10,000$ instructions and the new average CPI.