Multiplexor Block A 32-bit 4x1 Multiplexor is used to select the output from either the Arithmetic block, the Comparator block, the Logical block or the Shifter block. This is done through a 2-bit ALU selection signal. Zero Flag Detector Block The role of this block is to set the zero-flag bit to 1 whenever the output of any operation is equal to zero. This could easily be designed using a NOR gate at the output. Tasks You are required to design a 32-bit MIPS-like processor with 31 general-purpose registers. The first building blocks of the CPU are the ALU and the register file. 1. Task 1: Register File - Model the 32x32-bit register file given in Figure 2 as one single module in Logisim - Test the register file for correct operation by writing to and reading from different register combinations 2. Task 2: Arithmetic and Logical Unit (ALU) Design - Design a 32-bit ALU to perform all the arithmetic, logic and shift operations required by your data path - Model your designed 32-bit ALU in Logisim - Test the correct functionality of the operations implemented by the ALU, at least the operations that are mentioned in Figure 3