Name Exercise Number RAM After Load Address Value Address Value Address Value Address Value 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 Changes to the CPU registers: R1 R2 Operation Output Saved Output ase Initial Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute Name Exercise Number RAM After Load Address Value Address Value Address Value Address Value 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 Changes to the CPU registers: R1 R2 Operation Output Saved Output ase Initial Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute