Question: Creat a controller diagram (HLSM, datapath, FSM). Verilog code as well: In this project you will use RTL design methodology to design and implement a

Creat a controller diagram (HLSM, datapath, FSM). Verilog code as well:

In this project you will use RTL design methodology to design and implement a digital design for a 4-way traffic signal controller. The traffic signal dictates the flow of traffic through an Intersection.

Your goal is to create a stop light controller for a corner where two streets cross. There will be 2 lights ['NS' (or 'N') and 'EW' (or 'E')], and each can be in a possible state of 1 = go, 0 = stop. There will be no third state for slow and each light will be in any given state for 3 clock cycles. You may assume there is no turn lane and thus no turn signal.

Once, you have that part working, you will need to add a cross walk feature. A walker should be able to press a button and then, after the current state of the lights finishes, all lights should be in a red state for 5 clock cycles, allowing the walker to cross. You will need to come up with a HLSM, a datapath, and a controller for this system. Then, you will need to code the system using verilog, simulate using the EDA playground.


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TrafficSignal Steven Calvert Nicholas Cardinal Traffic Signal RTL design including crosswalk input Detailed Specification The purpose of this project is to serve as a functioning traffic signal that a... View full answer

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