Need help with this one

there is answer on chegg but I believe its wrong here is the link

https://www.chegg.com/homework-help/questions-and-answers/6-assume-lfsr-4-bit-state-feedback-function-xors-first-third-bit-left-given-following-init-q69253024

Please look at slide and formula and follow the same format

6. Assume a LFSR has a 4-bit state and a feedback function that XORs the first and third bit from the left. Given the following initial states, list out all of the states the LFSR cycles through, the period, and the sequence of output bits that are repeated. (All numbers are in binary notation) (a) 0000 (b) 0001 (C) 0011 (d) 0110 Feedback Shift Registers A feedback shift register (FSR) is an array of bits that uses a feedback function f to update the state and generate an output bit. Given state Rt, the updated state Rt+1 is calculated as: Rt+1 = (Rt 1) v f(Rt) The output is the leftmost bit that leaves the register after the shift. Consider a 4-bit FSR where the feedback function f XORs the four bits together. Initialize the state to 1100 The first update outputs a 1 and changes the state to 1000 The second update outputs a 1 and changes the state to 0001 The next three updates change the state to 0011, 0110, and 1100 Since it takes 5 updates to return to the original state, this FSR has a period of 5. There are two other possible 5-bit repeating sequences and 0000 never changes. . . 6. Assume a LFSR has a 4-bit state and a feedback function that XORs the first and third bit from the left. Given the following initial states, list out all of the states the LFSR cycles through, the period, and the sequence of output bits that are repeated. (All numbers are in binary notation) (a) 0000 (b) 0001 (C) 0011 (d) 0110 Feedback Shift Registers A feedback shift register (FSR) is an array of bits that uses a feedback function f to update the state and generate an output bit. Given state Rt, the updated state Rt+1 is calculated as: Rt+1 = (Rt 1) v f(Rt) The output is the leftmost bit that leaves the register after the shift. Consider a 4-bit FSR where the feedback function f XORs the four bits together. Initialize the state to 1100 The first update outputs a 1 and changes the state to 1000 The second update outputs a 1 and changes the state to 0001 The next three updates change the state to 0011, 0110, and 1100 Since it takes 5 updates to return to the original state, this FSR has a period of 5. There are two other possible 5-bit repeating sequences and 0000 never changes