Question: need nand2tetris hardware simulation code .hdl for registerhilo8 , hilomux and ALUDataPath ecah compnent of these has function to do with hdl code when you

need nand2tetris hardware simulation code .hdl for registerhilo8 , hilomux and ALUDataPath  need nand2tetris hardware simulation code .hdl for registerhilo8 , hilomux and
ALUDataPath ecah compnent of these has function to do with hdl code
when you run the code in nand2tetris hardware simulator i need this
ecah compnent of these has function to do with hdl code when you run the code in nand2tetris hardware simulator i need this code .hdl

N HiLoMux This has one 8-bit input bus, in, and one 4-bit output bus, out. Also present is a sel input, which is used to select what appears on out. If sel is false, then out should contain the lower 4-bits of in (i.e.in[0], in[1], in [2], in [3]). If sel is true, then out should contain the upper 4-bits of in (i.e. in [4] mapped to out[0], in[5], mapped to out [1], etc.). We'll use this circuit in a later exercise to enable the 4-bit Alucore below to do 8-bit operations. Mark 6 Gate Description RegisterHiLo8 This has one 4-bit input bus, in, and one 8-bit output bus, out, and is designed to store single byte of information. Unlike Register8, RegisterHilos only allows 4-bits of the value to be loaded at a time - so updating all 8-bits will take two separate loads. Therefore, RegisterHiLo8, has two further inputs loadlo, and loadHi to select whether the lower 4-bits should be stored (bits 0-3), or the upper 4-bits (bits 4-7) should be updated to reflect the input value, in, respectively. Hint The key to this is to store the value as two separate 4-bit value until you generate the output, out, of the circuit sums xors ands ors dataIn ALUDATAPATH dataOut carryout carryin op2Load hilo oplLoad notop2 resLoad N HiLoMux This has one 8-bit input bus, in, and one 4-bit output bus, out. Also present is a sel input, which is used to select what appears on out. If sel is false, then out should contain the lower 4-bits of in (i.e.in[0], in[1], in [2], in [3]). If sel is true, then out should contain the upper 4-bits of in (i.e. in [4] mapped to out[0], in[5], mapped to out [1], etc.). We'll use this circuit in a later exercise to enable the 4-bit Alucore below to do 8-bit operations. Mark 6 Gate Description RegisterHiLo8 This has one 4-bit input bus, in, and one 8-bit output bus, out, and is designed to store single byte of information. Unlike Register8, RegisterHilos only allows 4-bits of the value to be loaded at a time - so updating all 8-bits will take two separate loads. Therefore, RegisterHiLo8, has two further inputs loadlo, and loadHi to select whether the lower 4-bits should be stored (bits 0-3), or the upper 4-bits (bits 4-7) should be updated to reflect the input value, in, respectively. Hint The key to this is to store the value as two separate 4-bit value until you generate the output, out, of the circuit sums xors ands ors dataIn ALUDATAPATH dataOut carryout carryin op2Load hilo oplLoad notop2 resLoad

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