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You have been assigned the task of adding 8Kbytes of SRAM to the simple microprocessor system used as the first example in the chapter. a. Based on the memory map in Figure 6-3, how much address space is available below the 1/0 space for adding more SRAM to this system? b. Assuming you use the unused outputs of the 74LS138 RAM decoder for the first 4K bytes of the desired SRAM, what will be address range for this 4K block? c. Using another 74LS138, design a decoder that will enable another 4K block of SRAM that is contiguous with the blocks decoded by the 74LS138 in Figure 6-2b. MICROPROCESSOR A0:15 EPROM RD WR SRAM CYCLE DO:7 ADDRESS DECODER UART Parallel Port Timers Priority Interrupt Controller MOS Memory Addresses Use 0x0000-0x7FFF EPROM 0x8000 - 0x8FFF SRAM OxC000 - 0xFFFF 1/0 Devices Size 32 Kbytes 4 Kbytes Not Applicable Figure 6-3. Memory Map for simple microprocessor system in Figure 6-1 a 14LS13 AR AU AD A13 - G2A GONIS 811 2148 BIMB 2148 Aug 218 219 Drug airg RD WRE t5V CS2 (b) Figure 6-2. EPROM and SRAM blocks for a simple microprocessor system. (a) Schematic for EPROM block. (b) Schematic for SRAM block