No need to mark the datapath, only provide modifications/signals with reasoning.

Op Funct CLK Memory wDa Register Q3: Modify the single cycle CPU datapath of MIPS (if needed, mark them out in the next page) to support a new instruction called "cond lwsw", which either loads or stores according to the content of a register. For example: (5pts) Explain your answer here: cond lwsw $8, 24 ($9) does: PCPC4 else ($8>=0), $8 Mem [ $9 + 24] = (5pts) Existing control signals: RegWrite RegDst ALUSrc MemWrite MemtoReg_ New signals (if any): (Spts) List out the modifications here: Op Funct CLK Memory wDa Register Q3: Modify the single cycle CPU datapath of MIPS (if needed, mark them out in the next page) to support a new instruction called "cond lwsw", which either loads or stores according to the content of a register. For example: (5pts) Explain your answer here: cond lwsw $8, 24 ($9) does: PCPC4 else ($8>=0), $8 Mem [ $9 + 24] = (5pts) Existing control signals: RegWrite RegDst ALUSrc MemWrite MemtoReg_ New signals (if any): (Spts) List out the modifications here