NOTE: Looking for an answer for part b

Exercise 1. [20 Marks] The following tables summarizes the instructions present in some program (Table 1) as well as two different processors (Table 2). Processor 2 Operation Instruction Count ALU 750 Load 400 Store 350 Branch 400 Operation Processor 1 ALU 3 Load Store 4 Branch 1 6 3 2 Table 1: Program Instructions Table 2: Processor Instruction Cycles Unfortunately, your owner's manuals for these two processors seem to be missing a few pages. You are unsure of the number of cycles requires for a Load instruction on the first processor or for a ALU instruction on the second processor. Through experimental trials, you hope to determine the number of cycles required for the missing instruction type on each processor. For these trials, Processor 1 was clocked at 1.25 GHz and Processor 2 was clocked at 2.3GHz. (a) [8 Marks) Assume that the program in question has excellent locality; every memory access results in a cache hit! You have determined that the program in question requires 4.52us to execute on Processor 1 and 2.50us to run on Processor 2. Given this information, how many cycles does a Load instruction require on Processor 1? How many cycles does a ALU instruction require on Processor 2? (b) (12 Marks] Assume that the program in question has mediocre locality. That means, in this part, we must account for cache misses. Assume that both processors have a single level of banked cache. Processor 1 has a 3% instruction cache miss rate, a 5% data cache miss rate, and a 130 cycle miss penalty. Processor 2 has a 2% instruction cache miss rate, a 6% data cache miss penalty, and a 115 cycle miss penalty. The program runs in 14.028us on Processor 1 and 6.976us on Processor 2. Given this information, how many cycles does a Load instruc- tion require on Processor 1? How many cycles does a ALU instruction require on Processor 2? Hint: You will get different values for parts (a) and (b); see also Lecture 3, Section 4. Exercise 1. [20 Marks] The following tables summarizes the instructions present in some program (Table 1) as well as two different processors (Table 2). Processor 2 Operation Instruction Count ALU 750 Load 400 Store 350 Branch 400 Operation Processor 1 ALU 3 Load Store 4 Branch 1 6 3 2 Table 1: Program Instructions Table 2: Processor Instruction Cycles Unfortunately, your owner's manuals for these two processors seem to be missing a few pages. You are unsure of the number of cycles requires for a Load instruction on the first processor or for a ALU instruction on the second processor. Through experimental trials, you hope to determine the number of cycles required for the missing instruction type on each processor. For these trials, Processor 1 was clocked at 1.25 GHz and Processor 2 was clocked at 2.3GHz. (a) [8 Marks) Assume that the program in question has excellent locality; every memory access results in a cache hit! You have determined that the program in question requires 4.52us to execute on Processor 1 and 2.50us to run on Processor 2. Given this information, how many cycles does a Load instruction require on Processor 1? How many cycles does a ALU instruction require on Processor 2? (b) (12 Marks] Assume that the program in question has mediocre locality. That means, in this part, we must account for cache misses. Assume that both processors have a single level of banked cache. Processor 1 has a 3% instruction cache miss rate, a 5% data cache miss rate, and a 130 cycle miss penalty. Processor 2 has a 2% instruction cache miss rate, a 6% data cache miss penalty, and a 115 cycle miss penalty. The program runs in 14.028us on Processor 1 and 6.976us on Processor 2. Given this information, how many cycles does a Load instruc- tion require on Processor 1? How many cycles does a ALU instruction require on Processor 2? Hint: You will get different values for parts (a) and (b); see also Lecture 3, Section 4