Question: On a machine with a software - managed memory management unit ( MMU ) when a TLB miss occurs, what are the possible reasons? Does

On a machine with a software-managed memory management unit (MMU) when a
TLB miss occurs, what are the possible reasons? Does this always result in a bus-error/segmentation fault?
On a machine with a hardware managed MMU with hardware page-table walker, does a page fault always
result in a bus-error/segmentation fault?

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