Part II: 65 points (plug in your own RTL from the design in homework) Your tasks: most important for grading) 1. (40 points) Low Power Design Multi-core CPU with system bus and PMU: Integrate your RTL included CPUs (multi-core), system bus, shared memory, PMU, and other modules if applicable; and verify with simulation. a. Please explain how your verification worked and along with waveform (zoom-in clearly) b. Your multi-core CPU TB should, at least, include following cases: Test credit Function Case s Single core executes all the required commands and forms a 1 loop all the cores perform interleave-access to memory via yoursystem 2 bus. That is, more than one cores request to access memory 3 clearly show how your bus "arbitration" and "buffering" work Implement an interrupt signalfrom mastercore to othercoresand stop all the running tasks. (make it ready for poweroff) Hint, the 4 interrupt will change your FSM or controllerin your core Implementan adapter between system bus and serial interface of 5 PMU, so that, at least a mastercore can program your PMU 10