PART ONE: Choose the most suitable answer then circle your choice on the cover page. ONLY the cover page will be graded.

$[16$ points$]$

$(1)q,$ perform high$-$end scientific calculations and represent a small fraction of the computer market.

AT Supercomputers

C$)$ Fersonal computers

B$)$ Servers

Di Embedded computers

$(2)q,$ is one of $\frac{1}{0}$ registers that contains a ready bit $($set by the $\frac{1}{O}$ device when it is ready$),$ and an error bit $($indicating that the job is not completed$).$

A$)$ Cause register

C$)$ Data register

B$)$ Status register

D$)$ Command register

$(3)q,$ translates a file of assembly language into an object file.

A$)$ Compiler

C$)$ Linker

a$)$ Loader

DY Assembler

$(4)$ MIPS Instruction set does not include a "subi" $($subtract$-$immediate$)$ instruction. Why?

A$)$ Because a "subi" Instruction would require memory access.

B$)$ Having a "subi" instruction violates the design principle: simplicity favors regularty.

C$)$ Because in mest programs the subtraction operation does not require constant aperands.

D$)$ Because an 'addi' instruction with a negative constant would do$.$

$(5)$ In MIPS, the instruction addressing mode used in the branch instructions is $q,$

A$)$ Register

C$)$ Base

B$)$ PC$-$relative

D$)$ Pseudo Direct

$(6)$ Every assembly$-$language instruction corresponds to $q,$ machine$-$language instruction$($s$).$

A$)$ cne

C$)$ three

B$)$ two

D$)$ more than three

$(7)$ In which of the fallowing plpeline stages is the register file being accessed $($Read$/$write$)?$

A$)$ WB anly

C$)$ IF only

B$)$ ID anly

D$)$ Both A and $B$

$(3)$ What type of memory is used for cache memory?

A$)$ SRAM

C$)$ ROM

B$)$ DRAM

D$)$ Flash memory

$1$