Please answer number 6

Consider a system with 32 bit addresses, 4MB cache with 64 byte lines using 8-way set associative mapping Show how the address is divided into fields and specify size of each field in bits. Consider a system with 24 bit addresses, 8 KB cache with 16 byte lines using direct mapping. Show bow the address is divided into fields and specify the size of each field in bits. Your cache unit in the above question employs the FIFO replacement algorithm. It was found that the resulting hit rate is not sufficiently high. Indicate the effect on the cache hit rate of these possible changes.(circle one per line) No effect Small effect Large effect Increasing the size of main memory No effect Small effect Large effect Increasing the amount of cache memory No effect Small effect Large effect Employing the LRU instead of the FIFO algorithm No effect Small effect Large effect Implement virtual memory A memory system has cache with a read time of 4.6 RAM with a read time of 42.8 ns. Programs get an average hit rate 89% What at is the average memory access time for programs? If a program averages 1.7 memory accesses per instruction, how long will it take to execute an instruction(assuming the memory accesses is limit on the time? Circle the one best answer Which caching system is used most often for Intel level 2 cache? Direct Associative Set-associative Which caching system is the most difficult and costly to implement? Direct Associative Set-associative Which caching system usually provides the best hit rate? Direct Associative Set-associative What replacement algorithm is most effective? LRU FIFO LIFO random